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M07100 - SEMI M71 - Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI StdTpc-Process Chemicals - Bases SEMI E37 — High-Speed SECS

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Description

SEMI E37 — High-Speed SECS Message Service (HSMS)

SEMI MF1530-02 (first SEMI publication)

SEMI D9-0303 (Reapproved 0709)

NOTE 1: For determination of shallow and other defect densities in wafer production environments

M07100 - SEMI M71 - Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI StdTpc-Process Chemicals - Bases SEMI E37 — High-Speed SECS1 Purpose 1. 1 This Specification defines thin layer silicon on insulator (SOI) wafer requirements for CMOS large scale integrated circuit (LSI) devices. In the case of 200 and 300 mm wafers this Specification is targeted for nodes from 130 to 14 nm. In the case of 150 mm wafers, older LSI generations are included as well. By defining parameters, inspection procedures and acceptance criteria, both suppliers and customers may uniformly define product

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